hackpoint/plugin/fritzing/fritzing-parts/core/RFM12B_Transceiver_DIP_Package.fzp

<?xml version="1.0" encoding="UTF-8"?>
<module fritzingVersion="0.7.0b.02.01.5801" moduleId="2bbfed89356b4ec4a94ac6cee00e301f">
    <author>gareth@halfacree.co.uk</author>
    <title>RFM12B Transceiver DIP Package</title>
    <label>RFM12B</label>
    <date>2012-03-17</date>
    <tags>
        <tag>rf</tag>
        <tag>radio</tag>
        <tag>transceiver</tag>
        <tag>rfm12</tag>
        <tag>rfm12b</tag>
    </tags>
    <properties>
        <property name="family">RFM12</property>
        <property name="frequencies">315MHz/434MHz/868MHz/915MHz (see table on underside of board)</property>
        <property name="type">RF transciever</property>
        <property name="part number"></property>
    </properties>
    <description>RFM12B transceiver on DIP breakout board, 2mm pin spacing. Farnell part number 187-8284.</description>
    <views>
        <iconView>
            <layers image="icon/RFM12B_Transceiver_DIP_Package__581e0231.svg">
                <layer layerId="icon"/>
            </layers>
        </iconView>
        <breadboardView>
            <layers image="breadboard/RFM12B_Transceiver_DIP_Package__581e0231.svg">
                <layer layerId="breadboard"/>
            </layers>
        </breadboardView>
        <schematicView>
            <layers image="schematic/RFM12B_Transceiver_DIP_Package__581e0231.svg">
                <layer layerId="schematic"/>
            </layers>
        </schematicView>
        <pcbView>
            <layers image="pcb/RFM12B_Transceiver_DIP_Package__581e0231.svg">
                <layer layerId="copper0"/>
                <layer layerId="silkscreen"/>
                <layer layerId="copper1"/>
            </layers>
        </pcbView>
    </views>
    <connectors>
        <connector id="connector3" type="male" name="nIRQ">
            <description>DO - Interrupt request output (active low)</description>
            <views>
                <breadboardView>
                    <p layer="breadboard" svgId="connector3"/>
                </breadboardView>
                <schematicView>
                    <p layer="schematic" svgId="connector3pin" terminalId="connector3terminal"/>
                </schematicView>
                <pcbView>
                    <p layer="copper1" svgId="connector3"/>
                    <p layer="copper0" svgId="connector3"/>
                </pcbView>
            </views>
        </connector>
        <connector id="connector4" type="male" name="DCLCK/CFIL/FFIT">
            <description>DO/AIO/DO - Clock output (no FIFO )/external filter capacitor (analog mode)/FIFO interrupts (active high). When FIFO level set to 1, FIFO empty interruption can be achieved.
</description>
            <views>
                <breadboardView>
                    <p layer="breadboard" svgId="connector4"/>
                </breadboardView>
                <schematicView>
                    <p layer="schematic" svgId="connector4pin" terminalId="connector4terminal"/>
                </schematicView>
                <pcbView>
                    <p layer="copper1" svgId="connector4"/>
                    <p layer="copper0" svgId="connector4"/>
                </pcbView>
            </views>
        </connector>
        <connector id="connector5" type="male" name="nRES">
            <description>DIO - Reset output (active low)</description>
            <views>
                <breadboardView>
                    <p layer="breadboard" svgId="connector5"/>
                </breadboardView>
                <schematicView>
                    <p layer="schematic" svgId="connector5pin" terminalId="connector5terminal"/>
                </schematicView>
                <pcbView>
                    <p layer="copper1" svgId="connector5"/>
                    <p layer="copper0" svgId="connector5"/>
                </pcbView>
            </views>
        </connector>
        <connector id="connector6" type="male" name="GND">
            <description>S - Power ground</description>
            <views>
                <breadboardView>
                    <p layer="breadboard" svgId="connector6"/>
                </breadboardView>
                <schematicView>
                    <p layer="schematic" svgId="connector6pin" terminalId="connector6terminal"/>
                </schematicView>
                <pcbView>
                    <p layer="copper1" svgId="connector6"/>
                    <p layer="copper0" svgId="connector6"/>
                </pcbView>
            </views>
        </connector>
        <connector id="connector7" type="male" name="CLK">
            <description>DO - Clock output for external microcontroller</description>
            <views>
                <breadboardView>
                    <p layer="breadboard" svgId="connector7"/>
                </breadboardView>
                <schematicView>
                    <p layer="schematic" svgId="connector7pin" terminalId="connector7terminal"/>
                </schematicView>
                <pcbView>
                    <p layer="copper1" svgId="connector7"/>
                    <p layer="copper0" svgId="connector7"/>
                </pcbView>
            </views>
        </connector>
        <connector id="connector8" type="male" name="FSCK/DATA/nFFS">
            <description>DI/DO/DI - Transmit FSK data input/received data output (FIFO not used)/FIFO select</description>
            <views>
                <breadboardView>
                    <p layer="breadboard" svgId="connector8"/>
                </breadboardView>
                <schematicView>
                    <p layer="schematic" svgId="connector8pin" terminalId="connector8terminal"/>
                </schematicView>
                <pcbView>
                    <p layer="copper1" svgId="connector8"/>
                    <p layer="copper0" svgId="connector8"/>
                </pcbView>
            </views>
        </connector>
        <connector id="connector9" type="male" name="SDO">
            <description>DO - Serial data output with bus hold</description>
            <views>
                <breadboardView>
                    <p layer="breadboard" svgId="connector9"/>
                </breadboardView>
                <schematicView>
                    <p layer="schematic" svgId="connector9pin" terminalId="connector9terminal"/>
                </schematicView>
                <pcbView>
                    <p layer="copper1" svgId="connector9"/>
                    <p layer="copper0" svgId="connector9"/>
                </pcbView>
            </views>
        </connector>
        <connector id="connector10" type="male" name="SCK">
            <description>DI - SPI clock input</description>
            <views>
                <breadboardView>
                    <p layer="breadboard" svgId="connector10"/>
                </breadboardView>
                <schematicView>
                    <p layer="schematic" svgId="connector10pin" terminalId="connector10terminal"/>
                </schematicView>
                <pcbView>
                    <p layer="copper1" svgId="connector10"/>
                    <p layer="copper0" svgId="connector10"/>
                </pcbView>
            </views>
        </connector>
        <connector id="connector11" type="male" name="VDD">
            <description>S - Positive power supply</description>
            <views>
                <breadboardView>
                    <p layer="breadboard" svgId="connector11"/>
                </breadboardView>
                <schematicView>
                    <p layer="schematic" svgId="connector11pin" terminalId="connector11terminal"/>
                </schematicView>
                <pcbView>
                    <p layer="copper1" svgId="connector11"/>
                    <p layer="copper0" svgId="connector11"/>
                </pcbView>
            </views>
        </connector>
        <connector id="connector0" type="male" name="nINT/VDI">
            <description>DI/DO - Interrupt input (active low)/valid data indicator</description>
            <views>
                <breadboardView>
                    <p layer="breadboard" svgId="connector0"/>
                </breadboardView>
                <schematicView>
                    <p layer="schematic" svgId="connector0pin" terminalId="connector0terminal"/>
                </schematicView>
                <pcbView>
                    <p layer="copper1" svgId="connector0"/>
                    <p layer="copper0" svgId="connector0"/>
                </pcbView>
            </views>
        </connector>
        <connector id="connector1" type="male" name="SDI">
            <description>DI - SPI data input</description>
            <views>
                <breadboardView>
                    <p layer="breadboard" svgId="connector1"/>
                </breadboardView>
                <schematicView>
                    <p layer="schematic" svgId="connector1pin" terminalId="connector1terminal"/>
                </schematicView>
                <pcbView>
                    <p layer="copper1" svgId="connector1"/>
                    <p layer="copper0" svgId="connector1"/>
                </pcbView>
            </views>
        </connector>
        <connector id="connector2" type="male" name="nSEL">
            <description>DI - Chip select (active low)</description>
            <views>
                <breadboardView>
                    <p layer="breadboard" svgId="connector2"/>
                </breadboardView>
                <schematicView>
                    <p layer="schematic" svgId="connector2pin" terminalId="connector2terminal"/>
                </schematicView>
                <pcbView>
                    <p layer="copper1" svgId="connector2"/>
                    <p layer="copper0" svgId="connector2"/>
                </pcbView>
            </views>
        </connector>
    </connectors>
</module>