Sorki HEF4094 2011-08-30 DIP TTL Logic IC HEF Shift Register 4000 series HEF4094 DIP16 [THT] (Identical part HCF4094) The HEF4094 is an 8-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive-going clock transitions. The data in each shift register stage is transferred to the storage register when the strobe input is HIGH. Data in the storage register appears at the outputs whenever the output enable signal is HIGH. Two serial outputs are available for cascading a number of HEF4094 devices. Serial data is available at QS on positive-going clock edges to allow high-speed operation in cascaded systems with a fast clock rise time. The same serial data is available at Q'S on the next negative going clock edge. This is used for cascading HEF4094 devices when the clock has a slow rise time. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. +V

(also QP0) Parallel output

(also QP1) Parallel output

(also QP2) Parallel output

(also QP3) Parallel output

Ground supply voltage

(also QS1) Serial Output

(also QS2) Serial Output

(also QP7) Parallel output

(also QP6) Parallel output

(also QP5) Parallel output

STR - Strobe Input

(also QP4) Parallel output

Data input

Clock Input

Output Enable input